2023Q1 week log
. Last update 27 Mar 2023
I tend to keep quite a lot of notes on the development related (sometimes at
work, sometimes not) I do on a week-by-week basis, and thought it might be fun
to write up the parts that were public. This
may or may not be of wider interest, but it aims to be a useful aide-mémoire
for my purposes at least. Weeks with few entries might be due to focusing on
downstream work (or perhaps just a less productive week - I am only human!).
Week of 20th March 2023
Week of 13th March 2023
- Most importantly, added
footer images for this site from the Quick Draw dataset. Thanks to my son
(Archie, 5) for the assistance.
- Reviewed submissions for EuroLLVM (I'm
on the program committee).
- Added note to the commercially available RISC-V silicon
post about a
hardware bug in the Renesas RZ/Five.
- Finished writing and published what's new for RISC-V in LLVM 16
article and took part in
some of the discussions in the
HN and Reddit
(it's on lobste.rs
too, but that
didn't generate any comments).
- Investigated an issue where inline asm with the
m constraint was
generating worse code on LLVM vs GCC, finding that LLVM conservatively
lowers this to a single register, while GCC treats
m as reg+imm, relying
on users indicating
A when using a memory operand with an instruction that
can't take an immediate offset. Worked with a colleague who posted
D146245 to fix this.
for and ran the biweekly RISC-V LLVM contributor sync call as usual.
- Bisected reported LLVM bug
as it happens was fixed that evening by
D145474 being committed. We hope to
backport this to 16.0.1.
- Did some digging on a regression (compiler crash) for
-Oz, bisecting it to
the commit that enabled machine copy propagation by default. I found the
issue was due to machine copy propagation running after the machine
outliner, and incorrectly determining that some register writes in outlined
functions were not live-out. I posted and
landed D146037 to fix this by running
machine copy propagation earlier in the pipeline, though a more principled
fix would be desirable.
- Filed a PR against the riscv-isa-manual to disambiguate the use of the term
"reserved" for HINT
instructions. I've also
been looking at the proposed bfloat16 extension recently and filed an
issue to clarify if
Zfbfinxmin will be defined (as all the other floating point extensions so
far have an
- Almost finished work to resolve issues related to overzealous error checking
on RISC-V ISA naming strings (with llvm-objdump and related tools being the
- Landed D145879 and
D145882 to expand
coverage and fix an issue that surfaced through that.
- Posted a pair of patches that makes llvm-objdump and related tools
tolerant of unrecognised versions of ISA extensions.
D146070 resolves this for the base ISA
in a minimally invasive way, while
D146114 solves this for other
extensions, moving the parsing logic to using the
parseNormalizedArchString function I introduced to fix a similar issue
in LLD. This built on some directly committed work to expand
- The usual assortment of upstream LLVM reviews.
- LLVM Weekly #480.
Week of 6th March 2023
Week of 27th February 2023
- Completed (to the point I was happy to publish at least) my attempt to
enumerate the commercially available RISC-V
SoCs. I'm very
grateful to have received a whole range of suggested additions and
clarifications over the weekend, which have all been incorporated.
- Ran the usual biweekly RISC-V LLVM sync-up
Topics included outstanding issues for LLVM 16.x (no major issues now my
to fix and LLD regression was merged), an overview off
lowering fixes, GP relaxation in LLD, my recent RISC-V buildbot, and some
vectorisation related issues.
- Investigated and largely resolved a issues related to ABI lowering of
_Float16 for RISC-V. Primarily, we weren't handling the cases where a
GPR+FPR or a pair of FPRs are used to pass small structs including
- Part of this work involved rebasing my
patches to refactor our RISC-V ABI
lowering tests in Clang. Now that a version of my improvements to
update_cc_test_check.py --function-signature (required for the refactor)
landed as part of D144963, this can
hopefully be completed.
- Committed a number of simple test improvements related to half floats. e.g.
- Posted D145070 to add proper coverage
_Float16 ABI lowering, and
D145074 to fix it. Also
D145071 to set the
property, but the semantics of that are less clear.
- Posted a strawman psABI
__bf16, needed for the RISC-V bfloat16 extension.
- Attended the Cambridge RISC-V
- After seeing the Helix editor discussed on
lobste.rs, retried my previously
shared large Markdown file test
Unfortunately it's still unusably slow to edit, seemingly due to a
tree-sitter related issue.
- Cleaned up the static site generator used for this site a bit. e.g. now my
#159) for the
traverse() helper in mistletoe
where merged upstream, I
my downstream version.
- The usual mix of upstream LLVM reviews.
- Had a day off for my birthday.
- Publicly shared this week log for the first time.
- LLVM Weekly #478.
Week of 20th February 2023
Week of 13th February 2023
Week of 6th February 2023
- 2023-03-27: Added notes for the week of 20th March 2023.
- 2023-03-20: Added notes for the week of 13th March 2023.
- 2023-03-13: Added notes for the week of 6th March 2023.
- 2023-03-06: Added notes for the week of 27th February 2023.
- 2023-02-27: Added in a forgotten note about trivial buildbot doc
- 2023-02-27: Initial publication date.